Senior ASIC Physical Design Engineer

Key Qualifications

· BS or MS (preferred) in Electrical Engineering, Computer Engineering, Electronic Communications Engineering or equivalent with at least 5 years of proven experience

· Expertise in physical design, optimization, and ECO implementation

· Experience in sign-off closure issues in static timing analysis, noise, logic equivalency, physical verification, electromigration and voltage drop

· Experience in FinFET-based physical design

· Experience in preparing documentations and presentations

· Good communication skills in English

· Self-motivated to drive for excellence

· No domestic/international travel restriction

· Deferred or completed military service for male candidates

Preferred

· Experience in methodology or flow development

· Industry experience in RISC-V/Arm based SoCs and IP integration, power and clock management

· Proficient in Linux and scripting (Python, Perl, Tcl, etc.)

· Experience in Jira, Git, SVN